A Genetic Algorithm for Vlsi Floor Planning
نویسندگان
چکیده
The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient, cost effective algorithm. This paper presents a genetic algorithm to provide a solution to the floor planning technique. It incorporates slicing tree construction process for the placement and area optimization of circuit modules. It uses a probabilistic selection approach within its evolutionary cycle. Genetic algorithm produces optimal or nearly optimal solutions to the floor planning process by using techniques inspired by natural evolution, such as inheritance, mutation, selection, and crossover.
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